Boards have been produced, assembled, and shipped for both the Pro’s and Pro-be’s. Unfortunately, they’ve been stuck in US customs for almost two weeks now. Since the order was way over the $2500 threshold, they have to undergo a "formal customs entry" procedure. I’m told this can take up to 30 days at the moment, given how busy they are with all the recent trade rule changes. Grrr!

All other parts - the cases, ADCs, connectors, heatsinks, fans, cables, etc. - have arrived. So we’re just waiting on the boards to be delivered. Then there’s just the final assembly and testing and packing and shipping, which should take less than a month.

In the meantime, I’ve been working a little on a possible future upgrade of the Haasoscope Pro: the Haasoscope Pro Max! The idea would be to improve performance in a few key areas:

1. Increase the sample rate (from 3.2 to ~5 GS/s?) by using a newer FPGA capable of higher speed LVDS
2. Greatly increase memory depth (from 40k to ~400M samples?) by adding ~8 Gb of onboard DDR RAM
3. Enable faster data transfer (from 30 to ~300 MB/s) by using USB3

Amazingly, the ADC will run at 5 GS/s. I’ve tested this on a current Haasoscope Pro beta unit which I "overclocked" by feeding in a 50 MHz clock when it was expecting a 32 MHz clock. The data wasn’t very stable, as you’d expect, since the Cyclone IV FPGA is trying to receive data at 1250 Mb/s per LVDS lane, while the max spec is 875 Mb/s. But it worked well enough for me to verify that the ADC is working. Here’s what the data looks like - I’m using two units to do oversampling, so it’s actually 10 GS/s:

To make this all work, I’d need an FPGA capable of ~70+ lanes of faster LVDS, a fast DDR(4?) RAM interface (~100 Gb/s), and extra pins (~40) for the USB3 interface. I may end up using the new Altera Agilex 3 chip, like the A3CY100BM16A. Dev kits are now becoming available. The Efinix Titanium model also looks very interesting. The TI90G529 for instance can have up to 105 LVDS pairs, each at up to 1.5 Gbps, plus 48 other IO pins, and a 32-bit DDR4 memory interface, all at a quite reasonable price.

For the moment I’ve been testing things on an Efinix Titanium dev board. I managed to get the USB3 working quite easily, using an FTDI FT601 dev board which attaches to the FMC connector. I already get about 300 MB/s, which is not too far from the theoretical 400 MB/s max. Here’s what it looks like:

The FPGA code and Python and Rust scripts for trying out the data transfer is here, in case you want to play with it yourself: https://github.com/drandyhaas/Ti375G529_projects.

Dmitri has also been working hard on the software for the Haasoscope Pro, with some very nice features we think you’ll really like, better usability, and full scope functionality. More on that later!